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[ 原始碼: berkeley-abc  ]

套件:berkeley-abc(1.01+20191006git52a8ebb+dfsg-1)

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ABC - A System for Sequential Synthesis and Verification

This is a growing software system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. ABC combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification.

ABC provides an experimental implementation of these algorithms and a programming environment for building similar applications. Future development will focus on improving the algorithms and making most of the packages stand-alone. This will allow the user to customize ABC for their needs as if it were a tool-box rather than a complete tool.

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硬體架構 套件大小 安裝後大小 檔案
amd64 5,221。5 kB14,795。0 kB [檔案列表]
arm64 4,572。8 kB13,945。0 kB [檔案列表]
armel 4,423。9 kB13,719。0 kB [檔案列表]
armhf 4,663。4 kB10,083。0 kB [檔案列表]
i386 5,538。1 kB17,168。0 kB [檔案列表]
mips64el 4,687。2 kB17,317。0 kB [檔案列表]
mipsel 4,716。1 kB16,935。0 kB [檔案列表]
ppc64el 5,286。9 kB18,002。0 kB [檔案列表]
s390x 4,704。8 kB15,849。0 kB [檔案列表]