Pakket: covered (0.7.10-3.1)

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Het bronpakket covered downloaden:

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Externe bronnen:

Homepage [covered.sourceforge.net]

Vergelijkbare pakketten:

Verilog code coverage analysis tool

Covered is a Verilog code coverage utility that reads in a Verilog design and a generated VCD/LXT dumpfile from that design and generates a coverage file that can be merged with other coverage files or used to create a coverage report. Covered also contains the GUI coverage report utility that reads in a coverage file to allow interactive coverage discovery. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state/state-transition and assertion coverage.

Tags: Field: Elektronica, Implemented in: C, User Interface: interface::commandline, interface::graphical, X Window Systeem, Role: Program, Interface Toolkit: uitoolkit::tk, use::viewing, X Window Systeem: Application

Andere aan covered gerelateerde pakketten

depends

recommends

suggests

enhances

dep: libc6 (>= 2.11)

GNU C Bibliotheek: Gedeelde bibliotheken
Ook een virtueel pakket geboden door: libc6-udeb
dep: libtcl8.6 (>= 8.6.0)

Tcl (the Tool Command Language) v8.6 - run-time library files
dep: libtk8.6 (>= 8.6.0)

Tk toolkit for Tcl and X11 v8.6 - run-time files
dep: tklib

standard Tk Library
dep: zlib1g (>= 1:1.1.4)

compressiebibliotheek - programma's

rec: iverilog

Icarus verilog compiler

of verilog

virtueel pakket geboden door iverilog

of gplcver (>= 2.12a-1.1)

Verilog simulator

covered downloaden

Pakket downloaden voor alle beschikbare platforms
Platform	Pakketgrootte	Geïnstalleerde grootte	Bestanden
i386	530,8 kB	2.536,0 kB	[overzicht]