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[ Source: iverilog  ]

Package: iverilog (11.0-1.1 and others)

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Icarus verilog compiler

Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs.

The compiler can target either simulation, or netlist (EDIF).

Tags: Field: Elektronika, Implemented in: C++, User Interface: interface::commandline, role::program

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Download iverilog

Download for all available architectures
Architecture Version Package Size Installed Size Files
amd64 11.0-1.1+b1 1,975.9 kB6,857.0 kB [list of files]
arm64 11.0-1.1+b1 1,752.7 kB7,357.0 kB [list of files]
armel 11.0-1.1+b1 1,677.8 kB6,476.0 kB [list of files]
armhf 11.0-1.1+b1 1,731.7 kB5,445.0 kB [list of files]
i386 11.0-1.1+b1 2,061.2 kB6,926.0 kB [list of files]
mips64el 11.0-1.1+b1 1,649.5 kB8,989.0 kB [list of files]
mipsel 11.0-1.1+b1 1,672.7 kB8,183.0 kB [list of files]
ppc64el 11.0-1.1+b1 1,964.6 kB9,674.0 kB [list of files]
s390x 11.0-1.1+b1 1,783.2 kB7,045.0 kB [list of files]